1. Field of the Invention
The present invention relates to the manufacture of semiconductor chips and, in particular, to the optimization of chip shape between different lithographic tools used to print the layers for the chips on a semiconductor wafer. More particularly, the present invention relates to a method which utilizes an algorithm to determine optimal chip shape for a given photolithographic tool set.
2. Description of Related Art
Manufacturing productivity improvement in fabrication of chips from semiconductor wafers has traditionally been focused on elements within the direct control of the manufacturing area. Multiple lithographic tools are typically used to print different layers and/or areas of the chips on a semiconductor wafer. These tool sets may have different types of tools with different capabilities, depending on the printing requirements and tool availability. Lithographic tool productivity improvements have typically been derived from increasing tool availability and reducing product rework. However, with little leverage remaining within manufacturing, significant opportunities for lithographic tool productivity improvement must be realized outside of the manufacturing environment.
In the past, chip fabricators used a simple algorithm which found an optimum matrix for a single predefined lithographic tool. Currently, semiconductor chips are designed without consideration for photolithographic tool optimization and matrixed based simply on engineering judgment. U.S. Pat. No. 5,305,222 describes the advantage of using an optimum matrix of chips in a lens field. To date, quantitative approaches have not been used to design and matrix chips with regard to critical photo tool productivity constraints, e.g., tool-types; lens field sizes, and tool costs, time and capacity.
It has been found that reducing the number of exposure steps per wafer is a key component for lithographic tool productivity improvement. Chip dimensions and matrixing constraints have been found to be the greatest factors which drive the number of steps. However, this has been difficult to determine because of the various different types of tools within a given tool set and their different capabilities.
Bearing in mind the problems and deficiencies of the prior art, it is therefore an object of the present invention to provide a method for optimizing chip size for a given set of different lithographic tools.
It is another object of the present invention to provide a method of determining optimum chip size based on lowest cost of production.
A further object of the invention is to provide a method of selecting optimum chip aspect ratio for processing by a desired number of different lithographic tools.
It is yet another object of the present invention to provide a method to compare photolithographic matrices by cost, where cost may be any weighting factor.
Still other objects and advantages of the invention will in part be obvious and will in part be apparent from the specification.